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C/C++ Source or Header  |  1996-05-01  |  11.2 KB  |  284 lines  |  [TEXT/MPS ]
  1. /*
  2.      File:        PCIPlugin.h
  3.  
  4.      Contains:    This file contains all interface related structures and prototypes for pci expert to plugin
  5.  
  6.      Version:    Technology:    Copland
  7.                  Release:    Universal Interfaces 3.0d3 on Copland DR1
  8.  
  9.      Copyright:    © 1984-1996 by Apple Computer, Inc.  All rights reserved.
  10.  
  11.      Bugs?:        If you find a problem with this file, send the file and version
  12.                  information (from above) and the problem description to:
  13.  
  14.                      Internet:    apple.bugs@applelink.apple.com
  15.                      AppleLink:    APPLE.BUGS
  16.  
  17. */
  18. #ifndef __PCIPLUGIN__
  19. #define __PCIPLUGIN__
  20.  
  21. #ifndef __PCICOMMONPLUGIN__
  22. #include <PCICommonPlugin.h>
  23. #endif
  24.  
  25. #ifdef __cplusplus
  26. extern "C" {
  27. #endif
  28.  
  29. #if PRAGMA_IMPORT_SUPPORTED
  30. #pragma import on
  31. #endif
  32.  
  33. #if PRAGMA_ALIGN_SUPPORTED
  34. #pragma options align=mac68k
  35. #endif
  36.  
  37. #if FOR_SYSTEM8_PREEMPTIVE
  38. /* subordinate pci device tree 'reg' property structure definition*/
  39. struct PCIRegProperty {
  40.     UInt32                             physicalHigh;
  41.     UInt32                             physicalMiddle;
  42.     UInt32                             physicalLow;
  43.     UInt32                             propAddress;
  44.     UInt32                             propLength;
  45. };
  46. typedef struct PCIRegProperty PCIRegProperty;
  47.  
  48. typedef PCIRegProperty *PCIRegPropertyPtr;
  49. /* pci device tree 'bus-range' property structure definition*/
  50. struct PCIBusRangeProperty {
  51.     UInt32                             lowBus;
  52.     UInt32                             highBus;
  53. };
  54. typedef struct PCIBusRangeProperty PCIBusRangeProperty;
  55.  
  56. typedef PCIBusRangeProperty *PCIBusRangePropertyPtr;
  57. /* subordinate pci device description table entry header structure definition*/
  58. typedef LogicalAddress ConfigAddress;
  59. typedef LogicalAddress IOAddress;
  60. struct PCIDeviceTableEntryHeader {
  61.     RegEntryRef                     entry;
  62.     char                             name[32];
  63.     UInt32                             pciDomain;
  64.     UInt32                             pciBusNumber;
  65.     UInt32                             pciSecondBusNumber;
  66.     UInt32                             accessType;
  67.     PCIRegPropertyPtr                 regProperty;
  68.     ByteCount                         regPropertyCount;
  69.     IOAddress                         ioBase;
  70.     LogicalAddress                     rangeBase;
  71. };
  72. typedef struct PCIDeviceTableEntryHeader PCIDeviceTableEntryHeader;
  73.  
  74. typedef PCIDeviceTableEntryHeader *PCIDeviceTableEntryHeaderPtr;
  75. /* subordinate pci device description table entry structure definition*/
  76. struct PCIDeviceTableEntry {
  77.     struct PCIDeviceTableEntry *    nextDeviceEntry;
  78.     PCIDeviceTableEntryHeader         header;
  79.     PCIBridgeDescriptorPtr             BridgePlugin;
  80.     UInt32                             pluginSpecificStuff[16];
  81. };
  82. typedef struct PCIDeviceTableEntry PCIDeviceTableEntry;
  83.  
  84. typedef PCIDeviceTableEntry *PCIDeviceTableEntryPtr;
  85. /* type defs for plugin interfaces*/
  86. typedef OSStatus (*ConfigReadByteFuncPtr)(ConfigAddress configAddr, UInt8 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  87. typedef OSStatus (*ConfigReadWordFuncPtr)(ConfigAddress configAddr, UInt16 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  88. typedef OSStatus (*ConfigReadLongFuncPtr)(ConfigAddress configAddr, UInt32 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  89. typedef OSStatus (*ConfigWriteByteFuncPtr)(ConfigAddress configAddr, UInt8 valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  90. typedef OSStatus (*ConfigWriteWordFuncPtr)(ConfigAddress configAddr, UInt16 valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  91. typedef OSStatus (*ConfigWriteLongFuncPtr)(ConfigAddress configAddr, UInt32 valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  92. typedef OSStatus (*IOReadByteFuncPtr)(IOAddress ioAddr, UInt8 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  93. typedef OSStatus (*IOReadWordFuncPtr)(IOAddress ioAddr, UInt16 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  94. typedef OSStatus (*IOReadLongFuncPtr)(IOAddress ioAddr, UInt32 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  95. typedef OSStatus (*IOWriteByteFuncPtr)(IOAddress ioAddr, UInt8 valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  96. typedef OSStatus (*IOWriteWordFuncPtr)(IOAddress ioAddr, UInt16 valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  97. typedef OSStatus (*IOWriteLongFuncPtr)(IOAddress ioAddr, UInt32 valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  98. typedef OSStatus (*IntAckReadByteFuncPtr)(UInt8 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  99. typedef OSStatus (*IntAckReadWordFuncPtr)(UInt16 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  100. typedef OSStatus (*IntAckReadLongFuncPtr)(UInt32 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  101. typedef OSStatus (*SpecialCycleWriteLongFuncPtr)(UInt32 valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
  102. typedef OSStatus (*InitDeviceEntryFuncPtr)(PCIDeviceTableEntryPtr deviceDescriptor);
  103. typedef OSStatus (*GetIOBaseFuncPtr)(PCIDeviceTableEntryPtr deviceDescriptor, IOAddress *ioBase);
  104. /* pci domain descriptor definition*/
  105. struct PCIControlDescriptor {
  106.     PCIPluginHeader                 InterfaceHeader;
  107.     PCIDeviceTableEntry             PCIDeviceDescriptor;
  108.     DriverDescription *                TheDomainDriverDescription;
  109.     InitializeFuncPtr                 InitializeFunc;
  110.     ConfigReadByteFuncPtr             ConfigReadByteFunc;
  111.     ConfigReadWordFuncPtr             ConfigReadWordFunc;
  112.     ConfigReadLongFuncPtr             ConfigReadLongFunc;
  113.     ConfigWriteByteFuncPtr             ConfigWriteByteFunc;
  114.     ConfigWriteWordFuncPtr             ConfigWriteWordFunc;
  115.     ConfigWriteLongFuncPtr             ConfigWriteLongFunc;
  116.     IOReadByteFuncPtr                 IOReadByteFunc;
  117.     IOReadWordFuncPtr                 IOReadWordFunc;
  118.     IOReadLongFuncPtr                 IOReadLongFunc;
  119.     IOWriteByteFuncPtr                 IOWriteByteFunc;
  120.     IOWriteWordFuncPtr                 IOWriteWordFunc;
  121.     IOWriteLongFuncPtr                 IOWriteLongFunc;
  122.     IntAckReadByteFuncPtr             IntAckReadByteFunc;
  123.     IntAckReadWordFuncPtr             IntAckReadWordFunc;
  124.     IntAckReadLongFuncPtr             IntAckReadLongFunc;
  125.     SpecialCycleWriteLongFuncPtr     SpecialCycleWriteLongFunc;
  126.     InitDeviceEntryFuncPtr             InitDeviceEntryFunc;
  127.     GetIOBaseFuncPtr                 GetIOBaseFunc;
  128.     FinalizeFuncPtr                 FinalizeFunc;
  129. };
  130. typedef struct PCIControlDescriptor PCIControlDescriptor;
  131.  
  132. typedef PCIControlDescriptor *PCIControlDescriptorPtr;
  133. /* Prototypes for the PIM*/
  134. extern OSStatus PCIPluginInitialize(void);
  135.  
  136. extern OSStatus PCIPluginConfigReadByte(ConfigAddress configAddr, UInt8 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
  137.  
  138. extern OSStatus PCIPluginConfigReadWord(ConfigAddress configAddr, UInt16 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
  139.  
  140. extern OSStatus PCIPluginConfigReadLong(ConfigAddress configAddr, UInt32 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
  141.  
  142. extern OSStatus PCIPluginConfigWriteByte(ConfigAddress configAddr, UInt8 value, PCIDeviceTableEntryPtr pciDeviceEntry);
  143.  
  144. extern OSStatus PCIPluginConfigWriteWord(ConfigAddress configAddr, UInt16 value, PCIDeviceTableEntryPtr pciDeviceEntry);
  145.  
  146. extern OSStatus PCIPluginConfigWriteLong(ConfigAddress configAddr, UInt32 value, PCIDeviceTableEntryPtr pciDeviceEntry);
  147.  
  148. extern OSStatus PCIPluginIOReadByte(IOAddress ioAddr, UInt8 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
  149.  
  150. extern OSStatus PCIPluginIOReadWord(IOAddress ioAddr, UInt16 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
  151.  
  152. extern OSStatus PCIPluginIOReadLong(IOAddress ioAddr, UInt32 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
  153.  
  154. extern OSStatus PCIPluginIOWriteByte(IOAddress ioAddr, UInt8 value, PCIDeviceTableEntryPtr pciDeviceEntry);
  155.  
  156. extern OSStatus PCIPluginIOWriteWord(IOAddress ioAddr, UInt16 value, PCIDeviceTableEntryPtr pciDeviceEntry);
  157.  
  158. extern OSStatus PCIPluginIOWriteLong(IOAddress ioAddr, UInt32 value, PCIDeviceTableEntryPtr pciDeviceEntry);
  159.  
  160. extern OSStatus PCIPluginIntAckReadByte(UInt8 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
  161.  
  162. extern OSStatus PCIPluginIntAckReadWord(UInt16 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
  163.  
  164. extern OSStatus PCIPluginIntAckReadLong(UInt32 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
  165.  
  166. extern OSStatus PCIPluginSpecialCycleWriteLong(UInt32 value, PCIDeviceTableEntryPtr pciDeviceEntry);
  167.  
  168. extern OSStatus PCIPluginInitDeviceEntry(PCIDeviceTableEntryPtr deviceDescriptor);
  169.  
  170. extern OSStatus PCIPluginGetIOBase(PCIDeviceTableEntryPtr deviceDescriptor, IOAddress *ioBase);
  171.  
  172. extern OSStatus PCIPluginFinalize(void);
  173.  
  174. /* general purpose pci masks*/
  175.  
  176. enum {
  177.     kPCIconfigAddrReservedValue    = 0x00000000,
  178.     kPCIconfigAddrReservedMask    = 0xFF000000,
  179.     kPCIconfigAddrBusNumberMask    = 0x00FF0000,
  180.     kPCIconfigAddrDeviceNumberMask = 0x0000F800,
  181.     kPCIconfigAddrFunctionNumberMask = 0x00000700,
  182.     kPCIconfigAddrRegisterNumberMask = 0x000000FC,
  183.     kPCIconfigAddrAccessTypeMask = 0x00000001,
  184.     kPCIregisterByteMask        = 0x00000003,
  185.     kPCIregisterNotByteMask        = 0xFFFFFFFC,
  186.     kPCIregisterWordMask        = 0x00000002
  187. };
  188.  
  189. /* pci encoded-int structure constants definition*/
  190.  
  191. enum {
  192.     kPCIPhysicalHighRelocatableMask = 0x80000000,
  193.     kPCIPhysicalHighRelocatable    = 0x80000000,
  194.     kPCIPhysicalHighPrefetchableMask = 0x40000000,
  195.     kPCIPhysicalHighPrefetchable = 0x40000000,
  196.     kPCIPhysicalHighAliasedMask    = 0x20000000,
  197.     kPCIPhysicalHighAliased        = 0x20000000,
  198.     kPCIPhysicalHighSpaceCodeMask = 0x03000000,
  199.     kPCIPhysicalHighSpaceCodeConfig = 0x00000000,
  200.     kPCIPhysicalHighSpaceCodeIO    = 0x01000000,
  201.     kPCIPhysicalHighSpaceCodeMemory = 0x02000000,
  202.     kPCIPhysicalHighSpaceCode64Bit = 0x03000000,
  203.     kPCIPhysicalHighBusMask        = 0x00FF0000,
  204.     kPCIPhysicalHighDeviceMask    = 0x0000F800,
  205.     kPCIPhysicalHighDevice0        = 0x00000000,
  206.     kPCIPhysicalHighDevice1        = 0x00000800,
  207.     kPCIPhysicalHighDevice2        = 0x00001000,
  208.     kPCIPhysicalHighDevice3        = 0x00001800,
  209.     kPCIPhysicalHighDevice4        = 0x00002000,
  210.     kPCIPhysicalHighDevice5        = 0x00002800,
  211.     kPCIPhysicalHighDevice6        = 0x00003000,
  212.     kPCIPhysicalHighDevice7        = 0x00003800,
  213.     kPCIPhysicalHighDevice8        = 0x00004000,
  214.     kPCIPhysicalHighDevice9        = 0x00004800,
  215.     kPCIPhysicalHighDevice10    = 0x00005000,
  216.     kPCIPhysicalHighDevice11    = 0x00005800,
  217.     kPCIPhysicalHighDevice12    = 0x00006000,
  218.     kPCIPhysicalHighDevice13    = 0x00006800,
  219.     kPCIPhysicalHighDevice14    = 0x00007000,
  220.     kPCIPhysicalHighDevice15    = 0x00007800,
  221.     kPCIPhysicalHighDevice16    = 0x00008000,
  222.     kPCIPhysicalHighDevice17    = 0x00008800,
  223.     kPCIPhysicalHighDevice18    = 0x00009000,
  224.     kPCIPhysicalHighDevice19    = 0x00009800,
  225.     kPCIPhysicalHighDevice20    = 0x0000A000,
  226.     kPCIPhysicalHighDevice21    = 0x0000A800,
  227.     kPCIPhysicalHighDevice22    = 0x0000B000,
  228.     kPCIPhysicalHighDevice23    = 0x0000B800,
  229.     kPCIPhysicalHighDevice24    = 0x0000C000,
  230.     kPCIPhysicalHighDevice25    = 0x0000C800,
  231.     kPCIPhysicalHighDevice26    = 0x0000D000,
  232.     kPCIPhysicalHighDevice27    = 0x0000D800,
  233.     kPCIPhysicalHighDevice28    = 0x0000E000,
  234.     kPCIPhysicalHighDevice29    = 0x0000E800,
  235.     kPCIPhysicalHighDevice30    = 0x0000F000,
  236.     kPCIPhysicalHighDevice31    = 0x0000F800,
  237.     kPCIPhysicalHighFunctionMask = 0x00000700,
  238.     kPCIPhysicalHighFunction0    = 0x00000000,
  239.     kPCIPhysicalHighFunction1    = 0x00000100,
  240.     kPCIPhysicalHighFunction2    = 0x00000200,
  241.     kPCIPhysicalHighFunction3    = 0x00000300,
  242.     kPCIPhysicalHighFunction4    = 0x00000400,
  243.     kPCIPhysicalHighFunction5    = 0x00000500,
  244.     kPCIPhysicalHighFunction6    = 0x00000600,
  245.     kPCIPhysicalHighFunction7    = 0x00000700,
  246.     kPCIPhysicalHighRegisterMask = 0x000000FF,
  247.     kPCIPhysicalHighRegisterVendorID = 0x00000000,
  248.     kPCIPhysicalHighRegisterDeviceID = 0x00000002,
  249.     kPCIPhysicalHighRegisterCommand = 0x00000004,
  250.     kPCIPhysicalHighRegisterRevisionID = 0x00000008,
  251.     kPCIPhysicalHighRegisterCacheLineSIze = 0x0000000C,
  252.     kPCIPhysicalHighRegisterHeaderType = 0x0000000E,
  253.     kPCIPhysicalHighRegisterBaseAddress = 0x00000010,
  254.     kPCIPhysicalHighRegisterBridgeBusInfo = 0x00000018,
  255.     kPCIPhysicalHighRegisterCardbusCIS = 0x00000028,
  256.     kPCIPhysicalHighRegisterSubsystemVendorID = 0x0000002C,
  257.     kPCIPhysicalHighRegisterExpansionROMBase = 0x00000030,
  258.     kPCIPhysicalHighRegisterInterruptLine = 0x0000003C
  259. };
  260.  
  261. /* pci cycle access type for forwarding*/
  262.  
  263. enum {
  264.     kPCIaccessType0                = 0,
  265.     kPCIaccessType1                = 1
  266. };
  267.  
  268. #endif
  269.  
  270. #if PRAGMA_ALIGN_SUPPORTED
  271. #pragma options align=reset
  272. #endif
  273.  
  274. #if PRAGMA_IMPORT_SUPPORTED
  275. #pragma import off
  276. #endif
  277.  
  278. #ifdef __cplusplus
  279. }
  280. #endif
  281.  
  282. #endif /* __PCIPLUGIN__ */
  283.  
  284.